Support for amd64 family 15h processors
#include <perfmon/pfmlib.h> PMU name: amd64_fam15h_interlagos PMU desc: AMD64 Fam15h Interlagos PMU name: amd64_fam15h_nb PMU desc: AMD64 Fam15h Northbridge
The library supports AMD Family 15h processors core PMU in both 32 and 64-bit modes. The uncore (NorthBridge) PMU is also supported as a separate PMU model.
The following modifiers are supported on AMD64 Family 15h core PMU:
u
Measure at user level which includes privilege levels 1, 2, 3. This corresponds to PFM_PLM3. This is a boolean modifier.
k
Measure at kernel level which includes privilege level 0. This corresponds to PFM_PLM0. This is a boolean modifier.
h
Measure at while executing in host mode (when using virtualization). This corresponds to PFM_PLMH. This modifier is available starting with Fam10h. This is a boolean modifier.
g
Measure at while executing in guest mode (when using virtualization). This modifier is available starting with Fam10h. This is a boolean modifier.
i
Invert the meaning of the event. The counter will now count cycles in which the event is not occurring. This is a boolean modifier
e
Enable edge detection, i.e., count only when there is a state transition. This is a boolean modifier.
c
Set the counter mask value. The mask acts as a threshold. The counter will count the number of cycles in which the number of occurrences of the event is greater or equal to the threshold. This is an integer modifier with values in the range [0:255].
The uncore (NorthBridge) PMU does not support any modifiers.
Stephane Eranian <[email protected]> Robert Richter <[email protected]>